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%0 Conference Paper %A C. Tsai %A F. Pepe %A G. Mangraviti %A Z. Zong %A J. Craninckx %A P. Wambacq %T A 22.5-27.7-GHz Fast-Lock Bang-Bang Digital PLL in 28-nm CMOS for Millimeter-Wave Communication with 220-fs RMS Jitter %B 45th IEEE European Solid State Circuits Conference, ESSCIRC 2019 %I Institute of Electrical and Electronics Engineers Inc %8 Sep. 2019 %P 4
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