|
|
C. Tsai, F. Pepe, G. Mangraviti, Z. Zong, J. Craninckx and P. Wambacq, “A 22.5-27.7-GHz Fast-Lock Bang-Bang Digital PLL in 28-nm CMOS for Millimeter-Wave Communication with 220-fs RMS Jitter,” in 45th IEEE European Solid State Circuits Conference, ESSCIRC 2019, Institute of Electrical and Electronics Engineers Inc, Sep. 2019, pp. 4.
|
|
