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PD-SOI: Enabling Adaptive RF Front-End Modules Host Publication: SOI-3D-Subthreshold Microelectronics Unified Conference Authors: B. van Liempd, J. Craninckx and P. Wambacq Publisher: IEEE Publication Date: Oct. 2018 Number of Pages: 2 ISBN: 978-1-5386-7626-4
Abstract: Partially depleted silicon-on-insulator (PD-SOI) is a key enabling technology for adaptively tuned RF front-end modules (FEM). Unlike bulk CMOS, thanks to SOI’s insulating buried-oxide (BOX) layer, switched capacitor banks can allow for large voltage swing and exhibit a high small-signal linearity. This in turn enables LTE standard-proof power and linearity capabilities for tunable duplexers based on electrical-balance duplexers (EBDs) and N-path filters. These building blocks help to reduce the amount of SAW filters typically required in LTE handsets and enable in-band full-duplex (IBFD). This paper presents an overview of work related to tunable FEM in 180nm PD-SOI technology.
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