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A Performance Comparison Study of ECC and AES in Commercial and Research Sensor Nodes Host Publication: IEEE EUROCON 2013 Authors: A. De La Piedra, A. Braeken and A. Touhafi Publisher: IEEE Publication Date: Jul. 2013
Abstract: In the last years, a number of research sensor nodes
based on the combination of low-power microcontrollers and
FPGAs have been proposed. In these platforms, the FPGAs
serve as accelerators of complex algorithms, making it possible
to process a vast amount of sensing data in real time. In medical
applications that rely on sensors, both privacy and security are
of utmost importance. However, the execution of cryptographic
primitives on nodes solely based upon microcontrollers clocked
at a low frequency can affect the overall power consumption
of the platform. In this manuscript, we present the design
of a cryptographic accelerator based on FPGA and aimed to
be coupled to a microcontroller. It provides the most secure
implementation of the IEEE 802.15.4 security suite together with
an Elliptic Curve Cryptography (ECC) engine to perform key
establishment. Furthermore, we provide a comparison on per-
formance and energy consumption of cryptographic primitives
in commercial nodes and in the proposed design. Our results
suggest that the controlled execution of cryptographic algorithms
on FPGAs clocked at a low frequency improves the performance
and energy consumption of the state-of-the-art implementations
based on the MICA and Tmote nodes. However, our results also
reflect two inherent limitations of this type of design: the very
nature of the bus logic can undermine the expected improvement
on performance as well as the communication link between the
microcontroller and the FPGA can make the platform vulnerable
to physical attacks.
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