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DynamIA: Dynamic Hardware Reconfiguration in Industrial Applications Host Publication: 11th International Symposium, ARC 2015 Authors: N. Mentens, J. Vandorpe, A. Braeken, B. da Silva Gomes, A. Touhafi, A. Kern, S. Knappmann, J. Rettkowski, M. Al Kadi, D. Göhringer and M. Hübner UsePubPlace: Switzerland Publisher: Springer Publication Year: 2015 Number of Pages: 6 ISBN: 978-3-319-16213-3
Abstract: This paper presents the work that will be done in the research project “DynamIA: Dynamic Hardware Reconfiguration in Industrial Applications”. The project focuses on transferring knowledge on partial and dynamic reconfiguration of FPGAs from the academic partners to small and medium enterprises (SMEs), because the success stories on partial and dynamic reconfiguration were mainly only realized in large companies with a substantial amount of R&D activities. The reason is that the technology is still perceived as being difficult to adopt and expensive in terms of NRE costs. Therefore, the goal of the DynamIA project is two-fold. (1) It develops a number of use cases and guidelines in different application domains, tailored to the activities of the SMEs in the user group and in the broader target group. These use cases demonstrate a number of benefits of partial and dynamic FPGA reconfiguration, namely a faster startup, a faster design cycle and a lower occupation of resources leading to a lower static power consumption. (2) It develops a low-cost, vendor-independent emulation environment for dynamic and partial reconfiguration, which is non-existing in commercial and academic EDA tools. Another benefit of this emulation environment is that it can also be used for static designs. This allows SMEs to have a low-cost emulation environment for their applications instead of developing their own emulation environment manually (which is very time-consuming) or buying big cost-intensive commercial emulators. External Link.
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