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A 0.22mm2�CMOS resistive charge-based direct-launch digital transmitter with -159dBc/Hz out-of-band noise Host Publication: 2016 IEEE International Solid-State Circuits Conference (ISSCC) Authors: P. Paro, M. Ingels, P. Wambacq and J. Craninckx Publisher: IEEE Publication Date: Feb. 2016 Number of Pages: 3 ISBN: 978-1-4673-9466-6
Abstract: As in most RF circuits, the design of transmitters for advanced mobile communication systems is dominated by the tradeoff between cost and performance. While the former claims ever-smaller footprints and bill of materials (BOM), the latter comprises a stringent set of requirements regarding power consumption, signal integrity and out-of-band noise emission. Analog-intensive architectures [1,2] typically deliver the best noise performance at the cost of intensive lowpass filtering, hence increasing area consumption with bulky reconstruction filters. The digital transmitters [3LJ], on the other hand, are significantly more portable and area efficient, but they typically fall short in terms of out-of-band noise and spurious emission. A charge-based architecture was presented in [6], using incremental signaling in a switched-capacitance architecture to provide intrinsic noise-filtering capabilities with small power and area consumption. This work presents a transmitter architecture that leverages the incremental-charge-based operation by using power-efficient resistive DACs to deliver charge directly to the 50O output RF load, omitting the need for a PA driver stage, in a complete digital-intensive architecture. With a peak output power of 3.5dBm, the presented work achieves 끧dBc/Hz at 45MHz offset from both 900MHz and 2.4GHz modulated carriers, with an EVM performance of ᆸdB for a 64-QAM modulated signal.
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