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Comparing and combining GPU and FPGA accelerators in an image processing context Host Publication: 23rd International Conference on Field programmable Logic and Applications Authors: B. da Silva Gomes, A. Braeken, E. D'hollander, A. Touhafi, J. G Cornelis and J. Lemeire Publisher: IEEE Circuits & Systems Society Publication Date: Sep. 2013 Number of Pages: 4 ISBN: 978-1-4799-0004-6
Abstract: Nowadays, processors alone cannot deliver what computation hungry image processing applications demand. An alternative is to use hardware accelerators such as Graphics Processing Units (GPUs) or Field Programmable Gate Arrays (FPGAs). Applications, however, exhibit different performance characteristics depending on the accelerator. This paper describes the hybrid platform and the programming environment that allows to efficiently create programs on a combined GPU/FPGA desktop. We use the roofline model to identify the most appropriate accelerator for each application and High-Level Synthesis (HLS) tools to reduce the FPGA development time. To introduce our platform and tool chain both accelerators are compared by implementing a basic image operation. Next, a promising algorithm is explored and implemented, splitting and distributing the work between GPU, FPGA and CPU in order to validate the hybrid concept. Our results show that their combination exhibits a higher performance for computational intensive image processing applications than a GPU only. External Link.
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