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INTERFACING TO A NOVEL THREE-DIMENSIONAL CMOS CAMERA CHIP THROUGH USB 2.0 Host Publication: SPS-DARTS Authors: R. Grootjans, W. van der Tempel, D. Van Nieuwenhove and M. Kuijk Publication Date: Mar. 2006
Abstract: Due to recent breakthroughs in the development of a new, time-of-flight based, 3D camera chip, a novel system for interfacing to this chip had to be developed. The 3D camera chip has to be supplied with application specific signals and its data has to be transported in real-time to a PC for further processing.
The data produced by the 3D camera chip is converted to 12-bit binary code by 2 ADCs before being delivered to a Cypress Semiconductors high-end USB 2.0 microcontroller. A synchronization mechanism has been devised that allows adjustable data throughput of up to 192 megabits per second. With every pixel generating 4 packets of 12 bits at a frequency of 100 images per second, this allows real-time transportation of the data for future 3D camera chips with up to 128x128 pixels.
Furthermore, the application specific signals to be generated consist of high-frequency modulation signals, of which the frequency has to be adjustable during runtime. To this end, field programmable gate arrays were used, which are interfaced to the USB 2.0 microcontroller.
The design of this system is presented and its measurements are discussed.
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