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Low-Complexity, Low-Phase-Noise, Low-Voltage Phase-Aligned Ring Oscillator in 90 nm Digital CMOS Host Publication: Proceedings of ESSCIRC 2008 Authors: J. Borremans, J. Ryckaert, C. Desset, M. Kuijk, P. Wambacq and J. Craninckx Publisher: IEEE Publication Date: Sep. 2008 Number of Pages: 8 ISBN: 978-1-4244-2361-3
Abstract: An 8-phase phase-aligned ring oscillator in 90 nm digital CMOS is presented that operates up to 2 GHz. The low-complexity circuit consumes 13 mW at 2 GHz and 1.2 mW at 400 MHz, while a flat in-band phase noise below 끀 dBc/Hz is achieved, in close agreement with the presented theory. The circuit occupies an area of 0.008 mm(2).
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