|
%0 Conference Paper %A Y. Xiang %A D. Yakimets %A s. sant %A E. Memisevic %A m. garcia bardon %A A. S. Verhulst %A B. Parvais %A A. Schenk %A L. Erik Wernersson %A G. Groeseneken %T Trap-aware compact modeling and power-performance assessment of III-V tunnel FET %B 2018 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference, S3S 2018 %I Institute of Electrical and Electronics Engineers Inc %8 Feb. 2019 %P 3
|
