Presenter

Mr. Viki Szortyka - ETRO, Vrije Universiteit Brussel and IMEC Leuven [Email]

Abstract

The communication at millimeter-wave frequencies offers very large bandwidths that can
be used for multigigabit-per-second communication. The use of millimeter-wave bands
is considered as one of the important directions in the evolution of next generation wire-
less networks. The design of very high-speed and wideband circuits supporting directive
communication around 60 GHz is the topic of this thesis.
Analog baseband circuits for phased-array 60 GHz transmitters and receivers are de-
scribed in chapter 2. The baseband bandwidth of 880 MHz necessitates the design of
analog circuits, such as lowpass filters and variable-gain amplifiers with bandwidth in
excess of 1 GHz. Since 60 GHz radios typically use beamforming to alleviate the link
budget, analog baseband phase shifters are also studied. In the context of the two dis-
cussed transmitter beamformers and two receiver beamformers, the key to low-power
operation is shortening the signal path. Combining the functionality of beamforming and
biquadratic lowpass filtering into a proposed structure of a beamforming lowpass filter
is superior to a regular gm-C filter with the same total transconductor size, while also
including the interconnect parasitics.
Millimeter-wave sub-sampling PLLs are described next, in chapter 3. Local oscillator
phase noise in wideband radios mainly limits the performance due to its integrated value,
or jitter, that limits the error vector magnitude or, in other words, puts an upper bound on
the modulation order and datarate. The focus of this thesis is minimizing in-band phase
noise, which together with a low-noise VCO, leads to a low integrated phase noise. The
in-band phase noise is reduced by using a sub-sampling phase detector, similar to earlier
PLLs in the low-GHz range. As shown in this chapter operating the sub-sampling phase
detector at millimeter-wave frequencies can lead to signal loss due to sampling aperture
width. Moving the detector to the output of a divide-by-two prescaler helps in reducing
this effect and also relaxes the loading of the 60 GHz path. The design of the high-speed
prescaler is another issue in the implementation of a millimeter-wave PLL. A static divider
is designed for the presented PLLs, with the aid of inductive peaking and scaling down
the latch devices. In contrast to injection-locked solutions, the dividers are wideband and
do not need calibration.
In the last design (chapter 4) we look at a different use of the 60 GHz spectrum than
the high-datarate radios considered earlier, namely a low-to-medium datarate, duty-cycled
transceiver. The primary application considered for this transceiver is in brain-machine in-
terfaces (BMI), for example neural probes. Since such systems would typically be battery-
operated, a good energy efficiency is the main goal. The idea behind using the 60 GHz
band for datarates between 1 and 200 Mbps is using a radio at peak efficiency, but for a
very short time. In the presented eight-antenna-path phased-array system the extreme so-
lution is used of powering up the system only for transmitting or receiving a single on-off
keying modulated bit, while most of the time the radio is powered-off. Minimizing the
startup-time power overhead and eliminating most always-on blocks are two key require-
ments used throughout the described design. On the transmit side a fast-start oscillator
and power amplifier are used, synchronized with a central clock that is locally delayed in
each of the transmit elements for beamforming. In the receiver a passive phased-array is
followed by an active part consisting of an LNA, a rectifier and a comparator bank. A dig-
ital bang-bang clock-and-data recovery system maintains synchronization of the receiver
to the incoming pulses.

Short CV

Master of Science, Stefan Batory High School, Warsaw, Poland, 2009